42L 93K Load Board

ITS9000 Load Board Design Considerations

The load board used to interface the device under test (DUT) to the instruments in the ITS9000 Semiconductor Test System is a critical component in the overall test system performance.

The careful consideration of its design will allow consistent and repeatable test results increasing first pass yields and minimizing false failures, reducing the need for retesting failed devices and increasing test throughput.

Designing the load board might look like a routine task that can be accomplished easily, however with new technologies and increasingly complex devices to be tested, there are many more issues to be considered when developing the design.

Some factors that need to be considered early are board layout, parts placement, power planes and grounding. These factors all help minimize crosstalk, noise and current leakage issue and improve the electrical, signal performance and integrity.

The Device Under Test (DUT)

The first critical component in the design of the load board design is the DUT itself. Understand its characteristics; is it mixed signal, analog only or digital only? What are its power supply needs, single or multiple (analog and digital) supplies, ground pins – how many? In mixed signal devices the ground pins are usually separated into analog and digital grounds.

Also important are clock requirements: single or multi clock; does the device requires operating with a crystal (internal oscillator), does it have a PLL (Phase Lock Loop) – what components are needed for the PLL to operate?

In mixed signal and analog devices there might be outputs with high source impedance that requires buffering to prevent loading of the signal during operation. Also some inputs might require special signal conditioning for the DUT to operate correctly. Are there needs for pull-up or pull-down resistors, bypass capacitors, filtering?
On devices with high power requirements, power dissipation will need to be addressed. Power supply requirements are critical and decoupling capacitors are essential for their operation.

All of these issues require careful planning for the external components positioning, including relays to allow for connection and disconnection of components and instruments during testing. Understanding these requirements is critical for the load board lay out to maximize performance, signal integrity and minimize noise generation and crosstalk.

Test Socket

One of the most important components on the load board is the DUT socket. Its selection is critical to the overall performance of the load board and ultimately the test system. There are many different types of sockets from different manufacturers and selection will depend on several factors like: package type, frequency of operation, cost, contact type, contact material, DUT power requirements, temperature of operation, etc. The emphasis here is for reliability, the socket will be used tens of thousands if not hundreds of thousands of times, and it is the weakest link on the tester set up. During operation contacts are compressed and subject to wear, if used for temperature testing it sees extreme temperature variations, and debris and particles accumulates on its contacts after many insertions and removal of the DUT.

These and other factors create an environment where the socket will begin to deteriorate causing intermittent contact failures and over time it will eventually fail. One option that should be investigated when selecting the socket is whether the different socket components (contactors, springs, housing) can be replaced in case of damage, this will allow you to repair a socket and keep maintenance costs down. Careful consideration to the selection of the DUT socket will help you minimize the impact of the socket on the overall reliability of the test system.

ITS9000 Load Board Design

When it comes to high speed digital devices the ideal characteristic impedance for the load board should be 50 ohms. When laying out the high speed signal traces maintaining 50 ohm impedance will increase the bandwidth of the signals and prevent mismatching. A practical rule to remember is that it takes about an inch of trace for every nanosecond of signal rise time, so for a 2 nanosecond rise time signal a trace greater than 2 inches must be considered to be a transmission line and should be treated as controlled impedance trace.

A typical load board will have a minimum of 4 layers (see Fig. 1), high speed parallel signals and high speed clocks should be laid out first and should be as straight as possible from the source to the DUT pins; also try to reduce parallel trace runs, the longer they run side by side the more the propensity to have crosstalk between them. A good rule to follow is to have two times the width of the trace when routing signals close to each other. Signal traces should be equal length to minimize skew between signals, try to avoid running the signals through vias or minimize them as much as possible, they create impedance mismatches and degrade the signal integrity.

Other things to avoid during layout are sharp 90 deg. angle corners in high speed traces, turn traces using two 45 deg corners; this will lower noise generation and improve signal integrity.

If there is space available a highly effective technique for reducing crosstalk is to separate high speed signal traces (like high speed clock lines, reset or strobe signals) that run parallel to each other with a ground trace between them. This ground trace should be tied to the digital ground plane with vias at each end and at regular intervals, the closer the ground vias are to each other the lower the impedance of the ground trace, effectively creating a shield around the signal trace. If differential, high speed clock signals are involved, they should be routed together as a pairs with a ground trace between them and between other signals.
Sometimes there are components that are needed for the operation of the DUT such as crystals for internal oscillators or more specific the loop capacitor for an internal PLL. These components are external to the DUT and should be placed as close to the pins they belong to as possible. Since they might be susceptible to noise pickup, they could be shielded using a guard ring trace around these components.

A side effect of adding required components to the DUT (like pull-up or pull-down resistors, capacitors, etc) is how are you are going to test for the parameters on these pins when these components are connected to the DUT. Connecting instruments like source meters or DMMs to these pins will require a relay to disconnect these components during parameter measurements; a SPDT relay contact per pin and per component will allow you to connect and disconnect the instrument and component during tests and operation. The relay common (C) terminal should be connected to the DUT pin; the normally closed (NC) terminal should be connected to the component while the instrument will be connected to the normally open (NO) terminal. Typical relays used should be small signal relays with low capacitance and high signal bandwidth like the Coto 2200 series, Omron G6K series, NEC Tokin UA2/UB2 series, Panasonic GQ (AGQ) series etc.

Power Supplies and Ground Planes

During lay out of a mixed signal load board any component, including buffers, op amps, analog power supply pins that are part of the analog portion of the DUT should be connected to the analog supply power plane. Any digital supply pin and any digital circuit or components should be connected to the digital supply power plane; do not mix components from the two different power planes. The digital output pins generate fast current transients every time their outputs toggle creating noise that couples to the power lane, you want to keep these transient away from the analog power supply plane and prevent the injecting noise into the analog circuitry.

Decoupling capacitors, typically up to 100 KHz use electrolytic caps, from 100 KHz to about 10 to 15 MHz use 0.1uf, from 15 MHz to 100 MHz use 0.01uf and above 100 MHz a combination of 0.001uf with the PCB power and ground planes would be good a compromise; use good quality capacitors, Tantalum for the electrolytic caps and specially the ceramic caps should be surface mount. When decoupling the power supply pins on both analog and digital supply pins, place the caps as close the pins as possible and the  cap’s ground connection should be directly to ground, avoid connecting to ground through a trace and a via. On high power devices include a quality tantalum capacitor in parallel with the ceramic capacitor to supply the current demand for the device.

On a four layer board, the two internal layers are usually the power and ground layers while the two outside layers are used for signal routing. The power planes for a mixed signal device load board should be split between an analog supply plane and a digital supply plane (see Fig.2). It is necessary that at least one layer of the load board be dedicated to a solid ground plane. Source Power Supply ground connections (both analog and digital supply grounds) to the ground plane or planes should be made at one point or location.

The following figure shows the typical arrangement of the load board layers. When more than 4 layers are needed, add alternate ground and signal planes on the bottom of the load board. All the ground planes should be connected together to the power supply grounds with heavy, low impedance connections.

The signal routing for the digital traces and any digital signal or component should be routed over the digital power plane on the top signal layer, while any analog signal traces or analog components should be routed over the analog power plane on the top signal layer.

The reason for routing analog signals and digital signals on top of their corresponding power planes has to do with the return paths the currents take on the PCB. Any time a signal travels down a PCB trace a corresponding return current is generated. The path this return current takes is mostly dependent on the resistance (takes the path of least resistance) of the PCB plane for DC and low frequency signals, in this case they literally go in a straight line from source to load and back. As the frequency of the signal increases (around 1 MHz and above) the path the return current takes is mostly concentrated under the original signal trace (takes the path of less inductance), this is called the “proximity effect” and it follows the trace as it is laid out on the PCB. In reality the process is somewhat more complicated than this and includes several variables that affect it, but in general and what concern us here are the current return paths especially for digital signals.

For any digital signal that is routed on the top layer and crosses the power planes split line, you should include locations to add capacitors between each power plane and ground close to where the signal crosses the power planes. These capacitors allow for the return currents, which flow on the plane adjacent to the trace, to pass across the power planes close to where the signal crosses the power plane split (see Fig. 3). The reason for two capacitors is to minimize the possibility of coupling digital noise between the two planes.

Sometimes this might not be necessary because there may be a short return current path that somewhere we cannot see. So, it is generally good to lay out your board for use of these capacitors, and then test for differences in signal integrity with and without these capacitors in place.

The bottom layer signal routing does not need to follow this restriction since the ground plane is next to the signal layer providing a return path for the currents and shielding any noise from the power planes. Keeping the correct signal routing above their respective power plane will minimize the current loops that degrade signal integrity.

Use separate power sources for each power supply plane. Use a linear output power supply for the analog supply because mixed signal devices do not behave well with the high frequency supply noise generated by switching supplies.

Sometimes you have to deal with a high output impedance analog pin that have to drive external circuitry, in this situation it necessary to buffer the output signal using an op-amp (with low input bias currents) to be able to drive the circuitry without unnecessarily loading the signal down; if an op-amp is used, a relay might need to be added between the DUT pin and the op-amp to allow parametric testing of the DUT pin.

Other DUT Testing Equipment

At some point it might be necessary to connect the ITS9000 tester to either a wafer prober or a packaged part device handler. In this case a new load board will be designed with connectors for the wire harnesses used to connect the tester to the equipment. The wire harness should be built for high frequency, with 50 ohms impedance coaxial wires and connectors to maximize signal integrity and minimize noise pick up.

You should apply the same mixed signal design criteria when designing a load board for mixed signal device testing in a handler or prober as you would for a normal load board. The same separation of the power planes should apply here. Keeping the digital and analog signals separate in the wire harness will allow you to route the signals at the connector location into separate power planes.

Unless there is a direct docking between the ITS9000 and the handler, a DUT interface card for the handler will have to be designed to accommodate the wire harness connectors, any critical external components and the handler contactor needed to test the DUT.