Multilayer PCB

What is Multi-layer PCB lamination?

When designing standard single- or double-sided PCBs, lamination is typically not a concern. You can simply select the appropriate copper thickness and board thickness to meet design requirements. However, When designing a PCB with 4 to 30 layers, lamination design becomes a critical factor, as it directly impacts both the performance and cost of the PCB.

Rigid multilayer PCB stack-up structures are primarily composed of Core, Prepreg (semi-cured sheets, abbreviated as PP), and copper foil, which are combined according to the laminate design and then pressed under high temperature to form a multilayer board. The Core consists of two outer layers of copper foil with solid material filling between them, while the PP acts as a filler made of semi-cured resin. By selecting different thicknesses of Core and PP, a variety of stack-up configurations can be created to meet the requirements of different multilayer PCB designs.

18-layer PCBs buried resistor stackup

Flex Multilayer PCB stack-up is a specialized structure designed for flexible printed circuit boards, combining flexible substrates (usually polyimide), copper conductive layers, adhesives, and protective coverlays. Unlike rigid PCBs, these stack-ups prioritize flexibility, lightweight design, and durability.reinforcement layers are often added to specific areas of the flexible board to enhance mechanical strength, improve durability, or facilitate subsequent processing. The choice of reinforcement method depends on the product’s operating environment and specific requirements. Common reinforcement methods include adhesive reinforcement, metal reinforcement, FR4 reinforcement, and molded reinforcement.

Common configurations range from 2-layer to 20-layer flexible board designs, offering high design versatility for compact and dynamic applications. Flex multilayer PCBs are widely used in wearable devices, aerospace, automotive electronics, and medical instruments due to their ability to withstand bending and harsh conditions.

Multilayers PCB Lamination Design Principles

Before the PCB design starts, the Layout engineers will determine the number of layers of the PCB according to the size of the board, the scale of the circuit, and the requirements of electromagnetic compatibility (EMC). Then they will determine the component layout, and finally confirm the division of signal layers, power layers, and ground layers.

PCB laminate design requires consideration of multiple factors, including layer count, signal types, board thickness, material selection, copper thickness, impedance control, EMI/EMC shielding, thermal management, cost, and testability.

Meeting the Requirements of Signal Integrity for High-Speed Signal Routing

For high-speed multilayer circuit boards, signal layers are typically adjacent to internal plane layers (ground or power) and are effectively isolated from other signal layers to minimize crosstalk. During the design process, multiple reference ground planes can be incorporated to enhance electromagnetic absorption capability.

In a 10-layer high-speed PCB design, different stack-up configurations are used depending on the power plane requirements. For instance, in designs with a single power plane, a common stack-up could be S-G-S-S-G-P-S-S-G-S, whereas for two power planes, a configuration like S-G-S-S-G-P-S-S-P-S might be considered.

Adjusting the dielectric thickness between layers can help control crosstalk, such as increasing the thickness between S1-S2 or S3-S4 layers.

Stack-ups with multiple ground reference planes generally offer superior electromagnetic absorption and lower power impedance, contributing to better performance.

Additionally, stack-up design must account for signal integrity, avoiding discontinuities and loops in PCB planes, ensuring effective decoupling capacitance, mitigating unwanted impedance and loop currents, and eliminating magnetic flux. Proper stack-up choices are essential for achieving optimal electrical and electromagnetic performance in high-speed multilayer PCB designs.

Selection of PCB core materials, PP and copper foil

FR-4 can meet the needs of most PCBs, is inexpensive and has good electrical performance. High-speed PCBs will use high-speed board materials, such as Panasonic’s Megtron4/6, and RF PCBs will use carbon-hydrogen, Teflon, or ceramic substrates. Design scenarios with high heat dissipation requirements, such as automotive light board, will use aluminum or copper-based board materials, while display scenarios such as Mini LED will use glass-based substrates.

Key performance indicators for board materials are as follows:

High-speed Multilayer PCB board material selection

High-speed Multilayer PCBs require dielectric materials with the lowest possible loss tangent and a small dielectric constant. The design of high-speed PCBs requires special attention to the material specifications, including glass fiber (Fiberglass), dielectric matrix (Dielectric Matrix), and copper (Copper). Signals at higher data rates have higher frequency components, shorter wavelengths, and more reflections caused by impedance discontinuities. Consideration should be given to the effects of fiber glass and copper foil surface roughness.

The attenuation of signals by different types of board materials

In the above figure, Typical FR4 has an average loss of nearly 2 dB per inch at 28 Gbps (Nyquist frequency is 14 GHz), while Megtron6 has only 0.85 dB at the same frequency.

Skin Effect

Skin effect is a parameter that focuses on how much resistance there is within a channel that causes the signal frequency to be absorbed. Signal loss can happen when there are resistive losses in the channel that flows through the copper.

The roughness of the copper also plays a significant impact on insertion loss for the PCBs. The copper foil does not have a smooth surface, as this helps with the lamination and bonding processes. In addition, the rough surface increases the electrical rates and peel strength. However, the roughness of the copper can cause uneven current flows along the fields, resulting in insertion loss. To address this problem, your material selection will need to focus on low profile copper or very low profile electrodeposited (ED) copper to use for the PCB foils. In addition, avoiding black oxide processes can also be a benefit to controlling the roughness of the copper foil. Using alternative oxide before the lamination process is suitable.

Copper foil roughness

Copper foil roughness (copper tooth) causes the line width and line spacing to be uneven, resulting in uncontrollable impedance. At the same time, due to the skin effect, the current is concentrated on the surface of the conductor. The surface roughness of the copper foil affects the length of signal transmission.

                                                                               surface roughness of different grades of copper foil

As shown in the following figure, the impact of copper foil roughness is not too significant below 5 GHz, but it begins to increase significantly above 5 GHz. It is particularly important to pay attention to copper foil roughness in the design of high-speed signals above 10 GHz.

The attenuation of high-speed signals due to copper foil roughness

Multilayer PCB copper thickness per layer

The thickness of PCB copper foil is measured in ounces (oz). There are three common sizes of copper thickness: 0.5 oz (internal layers), 1 oz (outer layers), and 2 oz, which are mainly used in consumer and communication products. Copper thickness above 3 oz is considered thick copper, and is commonly used in high voltage and high current power electronics products.

When designing the layered structure, it is necessary to balance the thickness of copper foil to ensure that the power/ground plane copper thickness meets the current carrying requirements. For signal layer copper thickness, the line width/spacing is smaller, and the copper needs to be as thin as possible to meet the requirements of accurate etching. Due to the skin effect, high-speed signal lines only have current flowing near the surface of the copper foil, and thicker copper foil does not necessarily result in better performance. Therefore, the copper thickness of inner signal layers is typically 0.5 oz (Hoz).

Relative Dielectric Constant

Every core layers material and laminated material has varying dielectric constants. This dielectric constant is a measurement to see what how much potential electrical energy the material will possess and how much it will interact or impact signal frequencies. In addition, the dielectric constant can change based on the signal frequency that is introduced, as higher frequencies will require the materials to have more even dielectric constants while standing up to the increase in temperatures.

Insertion loss will usually occur because the PCB will be receiving multiple frequencies from the sent signals. Due to the different frequencies, differing impedance is present from the material, which can result in some of the signals becoming reflected or to experience phase distortion. Selecting a material that possesses a lower dielectric constant that has a flat frequency response is ideal as you want a material that provides faster signal propagation, smaller stray trace capacitance, and has a more consistent electrical energy to differing signal frequencies.

Loss Tangent

If the dielectric materials significantly absorb the signal, it means less of the frequency is reaching the desired end destination. For transmission lines in transceiver-based designs, this signal loss is also called the dissipation factor, as the materials will have an electromagnetic wave absorption rate.

The ideal material to use to deal with the dissipation factor is a low loss material so that more of the transmitted signal can pass through the transmission line with resistance, reflection or absorption. Lower loss materials will have greater costs, which can seriously impact the production of the Multilayer PCB’s stack-up.

Impedance control in the stackup

Many interface signal lines on PCBs have impedance requirements, such as common single-ended 50Ω and differential 100Ω. Impedance control requires a reference plane and generally requires more than four layers.

Impedance mismatch can lead to signal integrity issues such as signal distortion, reflection, and radiation, which affect the performance of the PCB. The copper thickness, dielectric constant, line width, and line spacing all affect impedance. We can calculate impedance using various EDA tools and then adjust the wiring parameters based on the designed stackup structure. Currently, conventional board houses can control impedance within 10%.

Hole structure of the stackup

Through-hole (PTH) goes through the entire PCB and can connect all layers. Blind vias can connect outer layers to one or more inner layers, but do not penetrate the PCB. Buried vias only connect inner layers of the PCB.

High-density (HDI) PCBs often use blind vias and buried vias to optimize wiring space. Blind vias and buried vias also require multiple lamination steps, increasing the difficulty of PCB manufacturing and making it more expensive.

When designing the stackup, it is necessary to design the hole structure throughout the board based on design requirements, and simplify the hole structure as much as possible while meeting the design requirements.

EMC design for PCB stackup

When designing the EMC of the PCB stackup, the following principles should be followed:

1.The power plane and ground plane within the board should be placed as close to each other as possible. Generally, the ground plane is above the power plane, which allows effective use of inter-layer capacitance as a smoothing capacitor for the power supply. At the same time, the distributed radiation current on the ground plane acts as a shield for the power plane.

2.The power and ground planes are allocated in the inner layers. The ground plane can be regarded as a shielding layer, which can effectively suppress inherent common-mode RF interference on the circuit board and reduce the distributed impedance of high-frequency power supplies.

3.The wiring layers should be arranged adjacent to the power or ground plane to create flux cancellation effects.

Radiation on PCB

PCB stackup thermal design

The PCB stackup design needs to consider thermal management to ensure that the heat generated by components is effectively conducted away, preventing thermal damage and improving circuit reliability. In the design process, we will first perform thermal simulations based on the power consumption of components, and optimize the component placement and design corresponding heat dissipation solutions based on the simulation results.

During the stackup design phase, targeted heat dissipation design can also be done:

1.Prioritize selecting board materials with high thermal conductivity and select metal substrates on demand;

2.Design heat dissipation pads below high-power devices, and use heat dissipation holes;

3.Buried copper blocks and embedded copper columns can improve heat conduction efficiency;

4.Increase ground planes, lay out ground in blank areas, and increase the heat dissipation area.

Board-level thermal simulation

Board thickness control

The conventional thickness of PCB products is 0.5mm, 0.8mm, 1.0mm, 1.2mm, 1.6mm, 2.0mm, 3.2mm, 6.4mm, etc. Generally, the board thickness is relatively thin for small areas, and for areas with frequent insertion and extraction or large areas where structural reliability is crucial, the board thickness needs to be made thicker.

PCB stackup design steps

The PCB stackup design generally follows the following steps:

1.Determine the total thickness of the stackup, which is the board thickness;

2.Determine the number of PCB layers and allocate signal layers, ground plane layers, and power plane layers;

3.Determine the copper thickness of the inner and outer layers;

4.Determine the distribution of impedance lines;

5.Determine the via structure;

6.Determine the residual copper rate for each layer, which should be symmetrical;

7.Choose board materials, PP materials, and copper foil that meet the design requirements.

Taking a 12-layer board as an example, the designed stackup structure is as follows: