What is IC package substrate?
IC substrates, also known as packaging substrates, are an indispensable part of the chip packaging process. They feature high density, high precision, high performance, miniaturization, and thinness. The primary functions of IC substrates are to support chips, provide heat dissipation, and offer protection, enabling multi-pin connectivity, reduced package size, improved electrical performance, enhanced thermal management, and multi-chip modularization.
IC substrates serve as the electronic signal connection bridge between the chip and the printed circuit board (PCB) through the internal circuitry of the substrate. They play a crucial role in protecting circuits, securing connections, and dissipating heat, IC substrates accounting for 35-55% of the total packaging process cost.
With advancements in wafer processing technology, increasing demands for wiring density, transmission speed, and reduced signal interference have driven the growing need for IC substrates. Additionally, IC substrates can integrate passive and active components to achieve specific system functionalities.
As wafer fabrication technology advances, the demands for higher wiring density, faster transmission rates, and reduced signal interference continue to grow, leading to increased demand for IC substrates.
Classification of IC Substrates by Material
1. Rigid Substrates
BT Substrates：
In IC substrate raw materials, the cost of resin-based substrates accounts for the highest proportion, exceeding 30%. Companies such as Mitsubishi Gas Chemical and Hitachi Chemical, which mainly produce BT resin-based (wire bond) substrates, each hold a global market share of 50% and 40%, respectively. BT substrates is synthesized from bismaleimide (BMI) and cyanate ester (CE) resins. It offers several advantages, including high Tg, high heat resistance, moisture resistance, and low dielectric constant (Dk).
However, BT resin substrates have some challenges compared to ABF-based FC substrates. Due to the glass fiber layer, BT substrates are harder, making wiring more complicated, and drilling more difficult. Additionally, the layout of fine lines requires higher precision. Despite these challenges, BT resin-based substrates provide dimensional stability during manufacturing, preventing thermal expansion and contraction from affecting line yield. As a result, BT substrates are primarily used in PBGA, WBCSP, and FCCSP packaging, particularly for chips that require high reliability, including memory chips, MEMS chips, RF chips, and LED chips.
ABF Substrates：
ABF substrates are built on a base material known as Ajinomoto Build-up Film (ABF). In 1996, Intel and Ajinomoto jointly developed ABF material. ABF substrates enable smaller line widths and spacing, as well as finer circuit patterns, making them suitable for high-pin-count and high-transmission packaging designs. This enhances the stability of processor chips during high-speed operation.
Since computing chips often use the FC-BGA (Flip Chip Ball Grid Array) packaging format, ABF substrates have become the primary choice for FC-BGA packaging.
MIS Substrates：
MIS substrates(Molded Interconnect Substrate) differ from traditional organic substrates like BT and ABF. They incorporate one or more pre-encapsulation structures interconnected through electroplated copper layers. This encapsulation structure offers two key advantages:
- Embedded Copper Wiring: This allows for finer wiring patterns.
- Encapsulation Material as Insulation: It provides superior moisture resistance.
Due to their enhanced wiring capabilities, superior heat dissipation performance, and smaller form factor, MIS substrates are often used as replacements for traditional QFN (Quad Flat No-lead) and lead-frame packaging. Their primary downstream applications include analog chips, power ICs, cryptocurrency chips, and server chips.
2. Flexible Substrates
- Key Materials: PI (Polyimide), PE (Polyethylene).
- Applications:
- Automotive electronics
- Consumer electronics
- Military applications, including launch vehicles, cruise missiles, and satellites
3. Ceramic Substrates
- Key Materials: Alumina (Al₂O₃), Aluminum Nitride (AlN), Silicon Carbide (SiC).
- Applications:
- Semiconductor lighting
- Laser and optical communication
- Aerospace technology
- Automotive electronics
- Deep-sea drilling and exploration
IC Substrate Technology
IC substrate technology can be categorized based on the connection method between the IC and the substrate, as well as the connection method between the substrate and the PCB.
IC-to-Substrate Connection Methods
Flip Chip (FC):
- In this method, the chip is flipped so that the front side is directly connected to the substrate using solder bumps.
- The substrate used in this process is called a flip-chip substrate, which serves as a buffer interface for electrical connection and signal transmission between the chip and the PCB.
- The substrate enables a fan-out function, ensuring that the chip’s logic gate outputs can connect to the maximum number of logic gate inputs on the circuit board.
2. Wire Bonding (WB):
- This method uses gold wires to connect the electrical pads on the IC chip to the substrate.
- The substrate used in this process is referred to as a wire-bonding substrate.
Flip Chip and Wire Bonding differ primarily in the way the chip and substrate are connected. Flip Chip uses solder bumps instead of gold wires, which allows for higher signal density, improved chip performance, and easier alignment during assembly. This results in better packaging yield. Due to its superior physical characteristics, flip-chip substrates are increasingly favored, and applications are expanding. For example, smartphone chip manufacturers are gradually transitioning from Wire Bonding to Flip Chip.
Mainstream IC Substrate Packaging Types
The mainstream products of IC substrates according to their packaging methods include BGA (Ball Grid Array, ball gate array packaging), CSP (Chip Scale Package, chip size package) and FC (Flip Chip, flip chip) substrates.
BGA (Ball Grid Array):
BGA packaging arranges many solder balls in an array on the bottom of the chip. The solder ball array replaces the traditional metal lead frame as pins, so it has a large area and can transmit more circuits. Depending on the materials used, BGA carrier boards can be divided into ceramic carrier boards (Ceramic BGA, CBGA), plastic carrier boards (Plastic BGA, PBGA), metal carrier boards (Metal BGA, MBGA) and tape carrier boards (Tape BGA, TBGA) four categories, among which PBGA has the advantage of low cost and is the mainstream product. BGA applications are mainly PC-related, accounting for about 30%, such as base stations, servers, DVDs, STBs, etc.
CSP (Chip Scale Package):
CSP generally refers to a packaged product with a side length within 1.2 times the chip contained, or a packaged product area less than 1.5 times the chip contained. All packaged products within this range can be called CSP. CSP packaging makes the chip and package area close to 1:1. CSP can achieve chip miniaturization. The biggest advantage is its light and small characteristics. In addition, its process is stable and cost control is easier. It is suitable for portable, thin and short communication electronic products. More than 70% of CSP is used in mobile phones. Other applications include RF, baseband, memory IC and PC peripherals. As high-end mobile phones have more complex functions, the number of chip I/Os continues to increase, and the substrate process requires a higher number of pins and a finer pitch, so the packaging technology is gradually moving from wire bonding to FC-CSP.
FC (Flip Chip):
Flip Chip (FC) packaging differs from traditional wire bonding by using solder or gold bumps as the medium for electrical connections. This approach provides superior electrical performance, better heat dissipation, low signal interference, high I/O pin count, and reduced circuit connection losses. Since FC packaging is better suited for chips with a high number of pins, it aligns with the trend of increasing chip pin counts, making it the mainstream packaging method of the future.
FC substrates are further divided into FC-BGA (Ball Grid Array) substrates and FC-CSP (Chip Scale Package) substrates, with FC primarily used in chips requiring significant computational power, such as CPUs and GPUs.
IC Package Substrates process
The development of packaging technology has progressed from traditional packaging to advanced packaging, which has raised higher requirements for the technical standards of IC substrates. The basic materials of IC substrates include copper foil, resin substrates, wet films, dry films, and metal materials, with the manufacturing process similar to that of PCBs. However, the wiring density, line width, layer alignment, and material reliability standards are all higher than those of PCBs. Compared to traditional PCB manufacturing processes, the technical challenges that IC substrates must overcome include core board manufacturing technology, micro-hole technology, blind hole copper plating and filling processes, pattern formation, and copper plating technology.
Traditional PCB manufacturing uses a subtractive process, where the minimum line width is greater than 50μm, which cannot meet the precision requirements of high-integration chip packaging. The subtractive process generally uses photosensitive resist materials to transfer electronic circuit patterns, employing chemical materials to protect areas of copper foil circuitry that do not require etching. A disadvantage of this process is that, during critical etching steps, the exposed copper foil may experience side etching (undercut) during the etching process, which can result in a low yield for finished products when the line width/spacing is less than 50μm. However, the subtractive process is more than sufficient for manufacturing PCBs for general purposes, FPCs, and HDI circuit boards.
Semi Additive Process (SAP) Technologies:
The Semi-Additive Process (SAP) involves processing an insulating substrate containing a photosensitive catalyst (ABF substrate) by exposing it to a circuit pattern, followed by chemical copper plating to form the wiring pattern. Compared to the subtractive process used in PCB manufacturing, the semi-additive SAP is more suitable for producing fine lines. However, the quality of the electrical connection is dependent on the substrate and the effectiveness of the chemical copper plating, which is not easy to control. The semi-additive process (ABF substrate) differs significantly from traditional PCB manufacturing methods in terms of cost, process complexity, and yield, and is not suitable for large-scale production. The semi-additive process can be used to produce flip-chip ABF substrates, with line width/spacing reaching 12μm/12μm. Under the improved semi-additive process, the line width of IC substrates can be reduced to below 25μm, meeting the requirements for advanced packaging.
We often talk about SAP PCB and the ability to produce much smaller circuit traces and space. I also want to point out that SAP processes are not limited to these fine feature sizes. SAP can produce much larger circuit patterns as well. As a thought starter, it is common for a design to have SAP layers that neck down to a 25-micron line and space to improve routing density in a tight BGA area and then neck out a larger trace size once through that area. This helps minimize any impact on impedance control. As an added bonus, related to impedance control, the SAP PCB process, because it is additive and not subtractive has much tighter control of line widths. Those larger traces, built with SAP, will have much less variance in width and consequently, much tighter impedance control than we are used to with subtractive etch printed circuit processing.
Modified Semi Additive Process(mSAP)Technologies:
The Modified Semi-Additive Process (mSAP) is used to achieve relatively low-density IC substrate designs (as well as ultra-high-density PCBs, such as those used in mobile phones) on thin copper foil laminates. The mSAP IC substrate manufacturing solution mainly aims to address the challenges of the subtractive process and the issues encountered in fine line production with the modified semi-additive process.
In the modified semi-additive process, chemical copper is applied to a substrate (e.g., BT-type substrates), and an etching resist pattern is created on it. The metal wiring pattern on the pre-made substrate is thickened using electroplating, after which the resist pattern is removed, and excess chemical copper is eliminated through a flash etching process. The remaining copper forms the fine electronic circuits.
Benefits of mSAP technology
- mSAP saves space as it allows denser conducting path layouts. This opens the way for the miniaturization of PCBs and devices.
- Short signal paths enhance signal transmission on the PCB.
- mSAP offers better performance at a smaller size.
- Radically thin PCBs for radically thin devices.
- mSAP shrinks PCBs, freeing up space for sensors, cameras and larger batteries.
The key feature of the mSAP process is that the pattern formation mainly relies on electroplating and flash etching. The chemical copper layer etched during the flash etching process is very thin, so the etching time is short, minimizing the risk of side etching (undercutting) of the electronic circuit lines.
