PCB Layout Checklist: Review Checks Before Fabrication

PCB layout release checklist: what needs evidence?

A PCB layout checklist should confirm that the released board matches the circuit, the selected components, the enclosure and the manufacturer’s agreed process. Check revision consistency, footprints, power and signal paths, fabrication limits, assembly access, test access and the actual exported files. A clean design-rule report is one piece of evidence, not permission to skip the other checks.

The schematic describes electrical connections. The layout gives those connections physical positions, copper shapes and holes. That difference explains why a board can have the correct connections yet still contain a reversed connector, an inaccessible test point or a clearance the chosen fabrication process cannot support.

Use the checklist below for a pre-fabrication review of a conventional rigid PCB. Add product-specific reviews for high voltage, RF, HDI, rigid-flex or regulated equipment. It is a release aid, not a substitute for circuit validation or compliance testing.

Each check needs an identifiable design revision, a reviewer and something another person can verify. A tick beside “routing checked” is less useful than a marked-up layout showing which critical nets were checked and against which requirements.

Use three states: Pass means the applicable requirement is met and evidence is attached; Hold means a decision or correction is still needed; N/A needs a written reason. An unexamined item is not N/A.

Assign a named owner to each row in your project copy. On a small team one person may own several rows, but the person approving the circuit should not assume that purchasing has verified the footprint or that the fabricator has checked the enclosure.

Are you reviewing the right revision and rule set?

Review one frozen release candidate against requirements accepted for that particular board. Otherwise, a correct review can approve the wrong set of files.

1. Identify the candidate. Record the board number, revision, assembly variant and CAD project version. Include the schematic, PCB, libraries and rule files needed to reproduce the outputs.
2. Collect the constraints. Use the intended layer construction, copper requirements, finished thickness, hole definitions, impedance requirements and relevant mechanical drawings.
3. Confirm the supplier context. Check that quoted capabilities apply to the chosen copper, layer structure and process, not merely to a general capability page.
4. List the unresolved decisions. Separate an approved value from a requested value and from an assumption. An assumption cannot silently become an acceptance limit.

For example, a PCB with more copper is not simply the same layout with a different order-box selection. The manufacturable feature geometry may change. Altium’s layout review guidance explains that fabrication constraints interact and that manufacturability does not, by itself, establish compliance with product requirements.

For a multilayer PCB, agree the relevant construction before treating impedance geometry or via choices as final. If the proposed stackup changes during quoting, identify the checks that must be repeated.

Do footprints and mechanical interfaces match the real parts?

Verify the exact ordered package and its physical connections, not just the component name displayed in CAD. A footprint can be internally consistent and still belong to the wrong package option.

Follow one connection from the datasheet to the board

Choose each new or changed footprint and compare the manufacturer’s package drawing with the library. Check pad numbering, pitch, body dimensions, exposed pads and the viewing direction used in the drawing. Then trace pin 1 through the schematic symbol, footprint and assembly orientation.

A connector illustrates the risk: a drawing viewed from the mating face can appear reversed relative to the solder side. Merely comparing two similar-looking rectangles will not catch the error. Label the viewpoint and verify named signals through the actual mating pair or cable drawing.

Check the space around the part as well as the part itself

Inspect screw heads, washers, standoffs, cable bends, connector latches, heatsinks and enclosure walls. A connector body may clear its neighbor while the mating plug cannot be inserted. Include maximum component dimensions and assembly tolerances where they affect fit.

A 3D comparison helps identify interference, but only if the models and offsets are correct. A 1:1 print can help with a basic footprint sanity check; confirm the print scale and do not use it as a precision tolerance measurement. Retain a marked-up drawing and the checked part number. Hold the release if the package or mating direction remains ambiguous.

Can power and signals follow the intended paths?

Review the whole electrical path, including its return, rather than judging isolated traces by their appearance. Concentrate first on high-current routes, switching circuits, fast interfaces and sensitive analog sections identified in the design requirements.

Look for power-path bottlenecks

Highlight a rail from its input connector to its load. Inspect narrow necks, vias, connector contacts and thermal-relief connections along that path. A wide copper area does not compensate for a small connection elsewhere in series.

Record the expected continuous and transient load, copper construction, permitted voltage drop and thermal assumptions. Use a calculation or simulation appropriate to those conditions, with prototype verification where needed. Do not approve a route using a universal “amps per millimeter” rule. If a temperature-rise estimate assumes an exposed outer layer, do not silently apply it to a different stackup or cooling environment.

Inspect the reference plane beneath critical routes

A fast signal needs a suitable return path as well as a forward trace. Display the signal layer together with its reference plane and follow the route past cutouts, via fields and layer changes. A trace can remain connected in the netlist while crossing a gap in its reference copper.

Texas Instruments’ AFE79xx Layout Guide, sections 10.5 and 10.6, explains how a split or void can force high-frequency return current to take a longer path. Use the actual device and interface requirements to assess your design; that guide’s specific geometry is not a universal rule for every PCB.

For controlled-impedance routes, retain the approved layer, geometry and reference assumptions. For matched interfaces, verify the applicable skew and topology requirements rather than making every visible trace the same length. Never bridge a safety isolation boundary just to shorten a signal return path; that requires a separate qualified safety review.

Can the board be fabricated, assembled and tested?

These are three different questions. Fabrication makes the bare board; assembly places and solders components; testing checks defined properties of the completed product. Evidence for one does not automatically answer the others.

Inspect holes as finished features with the required plating status and tolerances. A mechanical locating hole is not interchangeable with an electrical via. Similarly, “via-in-pad” is not a complete manufacturing instruction: clarify the required via treatment rather than allowing the supplier to guess.

For assembly, distinguish solder mask from solder paste. Mask defines exposed board surfaces; paste apertures control where paste is deposited for the selected assembly process. A design review must not assume that copying one layer into the other is suitable for every component.

Test access must match the chosen method. A pad visible in CAD may be obstructed by a tall connector after assembly or unreachable by the fixture. Conversely, adding a long test stub to a fast interface can create a new electrical problem. Agree the measurement method before modifying that route.

Capture disputed details with reference designators and coordinates. “Please check the board” is difficult to act on; “confirm access to TP7 after J2 is fitted” gives the assembler or test engineer a specific decision.

What does a clean DRC report actually prove?

A clean design rule check (DRC) report means the checked geometry and connectivity satisfy the enabled rules, subject to the tool’s scope and exclusions. It does not prove that the rules are correct or that the circuit will work.

Think of DRC as a checker that follows instructions. If the minimum spacing was entered incorrectly, the checker can faithfully approve a spacing that the project cannot accept. A library with the wrong pin mapping may also need a separate datasheet review.

As a concrete software example, the KiCad 9.0 PCB Editor manual describes zone refilling, schematic parity checks, unconnected items and persisted exclusions. In that version, use this review sequence:

1. Refill copper zones before the final DRC so the report reflects current copper.
2. Run the checks, including schematic parity when the board belongs to a schematic-linked project.
3. Inspect violations and unconnected items, then separately inspect excluded items and ignored tests.
4. Save the report and explain each accepted exception in the release record.

Other CAD tools use different controls. Check their documentation rather than assuming that a hidden warning has disappeared from the design. After a correction, rerun the affected checks and regenerate outputs; an old clean report does not validate a new layout.

How should a failed check be closed? A worked example

Close a failed check by recording the requirement, the observed condition, the decision and fresh verification. Do not close it merely because someone acknowledged the message.

Hypothetical example: a project has an agreed minimum copper spacing of 0.20 mm for a particular fabrication construction. The exported data shows 0.18 mm near J4. The gap is 0.02 mm below that project’s requirement. These values are illustrative, not QFPCB capability limits or electrical safety distances.

• If DRC used 0.15 mm, fix the rule and rerun the check. The earlier clean report tested the wrong requirement.
• If CAD shows 0.20 mm but the exported file shows 0.18 mm, investigate the revision or export discrepancy before changing geometry.
• Correct the design to meet the approved requirement, or obtain a documented, technically justified change to the requirement from the responsible parties. Supplier acceptance alone cannot waive an electrical or safety requirement.
• Regenerate the package and verify the measured feature again. Record the replacement revision and reviewer.

This record is also useful when handing a design to a colleague. They can see why the board was held, what changed and which files were actually approved.

Which files should leave the design team together?

Send a consistent package generated from the approved release candidate, with a manifest that says what each file is for. Confirm the supplier’s accepted formats rather than including several contradictory versions “just in case.”

• Bare-board data: the agreed fabrication dataset, such as Gerber plus drill data or an accepted intelligent format, including an unambiguous outline and plated/non-plated feature definitions.
• Fabrication requirements: drawing, stackup, finished thickness and copper requirements, material and finish requirements, critical tolerances and impedance requirements where applicable.
• Assembly data when assembly is ordered: BOM with exact manufacturer part numbers, placement data, assembly drawing, polarity information and clearly identified do-not-fit components.
• Test and programming instructions: required coverage, acceptance limits, access method and controlled firmware version where applicable.
• Release record: revision, variant, package manifest, approved exceptions and the person authorized to answer engineering questions.

Open the actual exported fabrication data in a separate viewer. Compare the layer count, outline, drill alignment, mask openings, revision marks and critical features with the approved design. Then cross-check assembly reference designators and fitted variants. Exporting successfully is not the same as checking the export.

Keep an immutable copy of exactly what was sent. If the manufacturer proposes a change, confirm whether it changes a controlled requirement and whether revised source files or release documents are needed. Avoid an email-only change that never returns to the design record.

Where you need external help resolving layout or file-preparation questions, QFPCB’s PCB design review services provide a relevant next step. Send the current revision and the specific open questions, not only a screenshot of the board.

PCB layout checklist questions

Is PCB layout review the same as schematic review?

No. Schematic review examines circuit intent and connections. Layout review checks the physical implementation, including footprints, routing, reference planes and mechanical fit. They overlap at synchronization and pin mapping, but neither replaces the other.

Should a checklist contain fixed trace widths and clearances?

Only when those values are tied to the specific design and accepted manufacturing process. Identify the source and scope of each limit. Current, copper construction, impedance, voltage and product requirements can lead to different limits.

Can I release a PCB if DRC has warnings?

Review each warning and record its disposition. An intentional, justified exception may be acceptable within the responsible review process; an unexplained warning is not. Do not suppress a violation simply to obtain a clean-looking report.

Does the manufacturer’s DFM review prove the circuit will work?

No. Design for manufacturability (DFM) addresses the relevant manufacturing constraints. Functional performance, firmware behavior, system integration and compliance require their own validation.

Do two-layer boards need a layout review?

Yes. Wrong footprints, connector direction, copper bottlenecks, inaccessible test points and inconsistent files can occur on a two-layer board. Keep the review proportional to the actual design risks rather than adding irrelevant multilayer checks.

Who should approve a layout before fabrication?

Assign approval to the people responsible for the requirements: electrical design, mechanical integration, manufacturing/assembly and testing as applicable. A small team can combine roles, but should still document who accepted each area.

What changes require another review?

Recheck the affected requirements after changes to parts, footprints, stackup, copper, routing, rules, variants or outputs. Consider interactions: a connector change may affect pin mapping, enclosure fit, assembly data and test access together.

What should I send with a request for layout review?

Provide the schematic, PCB source when available, fabrication outputs, BOM, mechanical drawing, stackup requirements and current issue list. State whether you want fabrication only, assembly, design assistance or test support.

Ready to resolve the remaining release questions? Contact QFPCB with your board revision, files, intended quantity and the checks still on hold. Ask for confirmation of the relevant fabrication and assembly requirements before authorizing production.