A PCB layer stackup defines the order of copper, dielectric, coverlay, bonding and reinforcement materials through the finished board. It controls more than layer count: reference planes, impedance, insertion loss, power integrity, via construction, bending reliability, thickness, copper balance and lamination sequence all depend on it.
QFPCB provides stackups impedance simulation and review services for customers of rigid multilayer, Flex PCB, Rigid-Flex PCB, HDI PCB(Anylayer HDI PCB) and High Frequency PCB. Send the electrical targets, mechanical limits and fabrication data before final routing. We can identify incompatible materials, unsupported via spans, weak return paths, asymmetric constructions and missing impedance information while changes are still manageable.
What QFPCB can review
Layer count, finished thickness and copper distribution
Signal, ground and power layer order
Core, prepreg, polyimide, coverlay and bonding construction
Controlled-impedance and insertion-loss inputs
Through, blind, buried and microvia spans
Flex and rigid-flex stackup zones and bend requirements
HDI buildup sequence and lamination count
High-frequency materials and RF/FR-4 hybrid constructions
Stackup drawing, fabrication notes, coupons and acceptance requirements
A stackup shown on this page is a planning example, not a production-ready recipe. QFPCB confirms the exact material grade, glass style, pressed dielectric thickness, copper, via structure, impedance geometry, panel plan and test method for each project.
8-layer inverter PCB stack-up
What Is a PCB Layer Stackup?
A PCB layer stackup is the controlled cross-section of a printed circuit board. It identifies every conductive and insulating layer from top to bottom, including copper thickness, dielectric material, dielectric thickness and the relationship between signal layers and reference planes. Flexible and rigid-flex boards also require coverlay, flex cores, adhesives, stiffeners and separate construction zones.
The stackup becomes a shared manufacturing document. The layout engineer uses it to set routing and impedance rules; QFPCB uses it to select materials, plan lamination, calculate finished geometry, define drills and build the board. If the CAD stackup, fabrication drawing and purchase specification disagree, the production result becomes ambiguous.
A useful stackup therefore answers five questions: What is each layer for? Which plane references each controlled signal? What materials and finished thicknesses are required? How are vias built? Which electrical and mechanical characteristics must be verified?
How QFPCB Develops a Manufacturable PCB Stackup
QFPCB starts with the product requirements rather than inserting extra layers by habit. Our engineering review follows this sequence:
Define the board type: rigid, flex, rigid-flex, HDI, high-frequency or a combination.
Collect constraints: outline, finished thickness, layer count range, component density, package pitch, bend zones, frequency, data rate, impedance, current and environment.
Plan reference planes: place critical signal layers next to continuous ground or otherwise approved return planes.
Select the interconnect architecture: through vias, blind/buried vias, microvias, sequential buildup, stacked or staggered structures.
Select materials: match electrical, thermal, mechanical, bend and sourcing requirements.
Model controlled structures: use the proposed finished dielectric and copper geometry, not generic calculator defaults.
Release a controlled revision: align the stackup drawing, Gerber or ODB++, drill data, impedance table and purchase notes.
The result may differ from an EDA library template. That is normal when the library construction does not match available material thicknesses or the required fabrication process. QFPCB returns proposed changes for approval before production.
How to Choose Layer Count and Layer Order
Choose layer count from routing density, reference-plane needs, power distribution, component escape, EMC risk, thickness and cost. The question is not simply whether every net can be routed. A board can be routable and still have poor return paths, weak plane coupling or an impractical via structure.
Two-Layer Starting Point
A two-layer board normally uses signal and copper pours on both sides. It can suit low-density, slower or cost-sensitive designs, but it offers limited freedom to place every fast signal next to a continuous reference plane. Controlled impedance may require wider traces or a thinner finished board than the mechanical design allows. Review the actual edge rates and current paths before selecting two layers solely for cost.
Four-Layer Starting Point
A common four-layer concept is Signal / Ground / Power or Ground / Signal. Another useful EMI-oriented concept is Signal / Ground / Ground / Signal with power routed on the outer layers. The better choice depends on power complexity, routing density, reference continuity and dielectric spacing. A layer name alone is insufficient—the stackup must show how closely each signal layer couples to its reference.
Six-Layer Starting Point
Six layers provide more ways to give outer and inner signal layers adjacent references while creating a useful plane pair. Example concepts include Signal / Ground / Signal / Power / Ground / Signal or Signal / Ground / Signal / Signal / Ground / Signal. The final order depends on whether the inner layers carry high-speed signals, slower routing or power distribution. Avoid assigning a fast signal layer to a distant or heavily split reference plane.
Eight Layers and Above
Additional layers can separate sensitive routing, power distribution and high-density escape, but extra copper layers do not automatically improve signal integrity. A good eight-layer or higher stackup establishes clear routing-reference pairs, reasonable plane coupling, symmetric construction and a via strategy that does not create unnecessary stubs. Layer count should be confirmed together with package breakout and drill architecture.
Signal, Ground and Power Plane Planning
Fast signals need a controlled return path. Place each critical signal layer next to a continuous reference plane and avoid routing across plane splits, large voids or changes in reference without a deliberate transition strategy. Ground is normally the simplest high-frequency reference. A power plane can act as a reference only when it is continuous for the route and the return path between power and ground is controlled over the relevant frequency range.
Plane order also affects the power distribution network. Closely spaced power and ground planes add distributed capacitance, while wider spacing reduces that coupling. The stackup should reserve enough dielectric thickness for target impedance without separating every plane pair so far that power integrity suffers.
Copper balance matters mechanically. Large differences in copper density or dielectric construction across the centerline can increase bow, twist or layer movement during lamination. QFPCB reviews copper distribution, resin demand and symmetry with the panel construction rather than judging only the finished single-board image.
Materials, Copper and Dielectric Thickness
Stackup calculations require finished construction values. Core thickness, prepreg style, resin content, copper weight and lamination behavior interact. A prepreg designation does not by itself guarantee one pressed thickness because resin fills the surrounding copper pattern during lamination.
Copper affects both electrical and manufacturing results. Base foil, pattern plating, etch compensation and conductor profile change the finished cross-section. Heavier copper can require wider spacing and more resin, while low-profile copper can reduce conductor-loss penalties in selected high-frequency designs.
Material selection should match the board type. Rigid boards often use FR-4 or higher-performance thermoset laminates. Flex circuits commonly use polyimide-based constructions with rolled-annealed or selected electrodeposited copper, coverlay and adhesive systems. High-frequency designs may use Rogers, Taconic, Arlon, Wangling or hybrid RF/FR-4 constructions within QFPCB’s project-reviewed process window. Exact grade and thickness availability must be confirmed at quotation.
Flex PCB Stackup Design
A Flex PCB stackup must meet electrical requirements while surviving bending, installation and handling. It can include one or more copper layers, polyimide dielectric, adhesive or adhesiveless copper-clad material, coverlay, selective stiffeners, shielding films and local reinforcement. The bend region should remain thin, balanced and free of unnecessary material transitions.
Single-Layer Flex Concept
A typical single-layer flex has coverlay, one copper conductor layer, a polyimide base and an optional stiffener in the connector or component area. It is useful where routing is simple and maximum flexibility is important. The stiffener supports assembly or connector insertion but should not end abruptly at a highly stressed bend without a reviewed transition.
Double-Layer Flex Concept
A double-layer flex places copper on both sides of a flex core and may use plated through connections outside critical bend regions. It offers more routing and reference options but becomes stiffer than a single-layer circuit. Copper distribution, coverlay openings, via location and bend direction must be considered together.
2Layers Flexible Circuit Board Design
Multilayer Flex and Dynamic Bending
Multilayer flex increases routing capacity but also increases bending stiffness and interlayer stress. Dynamic-flex applications require a different stackup mindset from flex-to-install products. Keep conductors away from the neutral-axis extremes where practical, use smooth curved routing through the bend, stagger traces between layers and avoid vias, pads, component edges and abrupt copper changes in the active bend zone. Provide bend radius, bend angle, cycle count and installation direction to QFPCB.
Rigid-Flex PCB Stackup Design
A Rigid-Flex PCB stackup contains at least two construction zones: rigid areas that support components and flex areas that connect or fold between them. The flex layers normally continue through the rigid sections, while rigid cores, prepregs and outer copper are selectively added in the rigid zones. The drawing must show each zone separately; one simplified cross-section is rarely enough.
Key decisions include whether the flex layers sit near the center of the rigid stack, how the rigid-to-flex transition is formed, where coverlay terminates, whether no-flow bonding material is required, and how copper is balanced. Plated holes, microvias and component pads should be kept away from transition stress zones according to the approved design rules.
A rigid-flex design can reduce connectors and assembly steps, but it adds material, tooling, lamination and documentation complexity. QFPCB should review the mechanical model, bend direction, rigid and flex outlines, layer-to-layer transitions, stiffeners and assembly sequence before the stackup is frozen.
6 layer rigid flex PCB with a 4 layer flex stack up
HDI PCB Stackup Design
An HDI PCB stackup uses microvias, fine features and one or more buildup cycles to escape dense packages or reduce board size. Common architecture language includes 1+N+1 and 2+N+2, where the outer numbers describe buildup layers on each side of a conventional core. This notation does not define every via span, material or impedance layer; a complete drill and lamination plan is still required.
1+N+1 HDI
A 1+N+1 construction adds one microvia buildup layer to each side of the core. It can support BGA escape and short layer transitions without the cost and risk of more buildup cycles. The design must decide whether the first inner layer remains a solid reference plane or provides limited escape routing over a deeper plane. That decision affects return paths, usable routing density and microvia connections.
2+N+2 and Higher Buildup
Two or more buildup layers can support finer-pitch packages and more complex escape, but each additional lamination cycle affects registration, material selection, cost and reliability. Stacked microvias may save space but concentrate stress; staggered microvias use more area but can provide a less concentrated structure. Do not select stacked, skip or copper-filled microvias only from an EDA example. QFPCB must confirm the full via map, dielectric thickness, land sizes and acceptance plan.
8Layer 2nd order HDI Impedance-Controlled PCB Stackup
HDI Reference Planes and BGA Escape
Recent engineering discussions often ask whether L2 should remain solid ground or be used for escape routing in a 1+N+1 board. There is no universal answer. A solid nearby reference benefits outer-layer signals, while limited escape on L2 may be necessary under a dense BGA if L3 provides the continuous reference. The correct choice comes from the package breakout, via architecture, signal classes and electromagnetic return path—not from layer numbering alone.
High Frequency PCB Stackup Design
A High Frequency PCB stackup must control impedance and loss while remaining mechanically manufacturable. Material Dk and Df, dielectric thickness, copper profile, trace geometry, bonding film, reference planes and surface finish all affect RF behavior. The datasheet value used in a circuit model must correspond to the material construction and test method intended for production.
QFPCB’s documented high-frequency process baseline includes Rogers RO3000, RO4000, RT5000 and RT6000 families, selected Arlon, Taconic and Wangling materials, plus project-reviewed RF/FR-4 hybrid lamination. The general window lists 1-70 layers and 4-70-layer hybrid constructions, but those maximums are not a combined promise. Exact material grade, thickness, copper, bonding system, panel size, impedance and test requirements must be confirmed together.
For an RF outer layer, microstrip or grounded coplanar waveguide can provide access to components and connectors. Stripline offers shielding inside the board but adds dielectric and conductor loss. Hybrid stackups can place low-loss material only where the RF circuit needs it, reducing cost, but differences in lamination temperature, resin flow, CTE and dimensional movement require additional review. Keep RF layers and bonding constructions reasonably symmetric whenever the mechanical design allows.
Controlled Impedance, Insertion Loss and Verification
Controlled impedance is created by the finished stackup and conductor geometry. For each controlled structure, provide the target, tolerance, layer, line type, reference plane, nominal width and differential spacing where applicable. QFPCB can calculate a production geometry and identify conflicts before routing is released.
At higher frequencies or longer channel lengths, impedance alone is not enough. Insertion loss depends on dielectric loss, copper roughness, conductor width, frequency and route length. Return loss and launch discontinuities may also control performance. State whether the requirement applies to a coupon, a routed channel or a system interface, and define the frequency range and test method.
TDR coupon testing can verify representative impedance structures. It does not replace bare-board continuity and isolation testing, nor does it automatically characterize the complete high-frequency channel. VNA or other frequency-domain measurements may be required when insertion loss, return loss or S-parameters are acceptance criteria.
Via Architecture, Lamination and DFM Checks
The via plan must be designed with the stackup. A through via crosses the full thickness and can leave a stub on high-speed signals. Blind and buried vias reduce some routing constraints but require additional drilling or lamination steps. Microvias connect thin adjacent dielectric layers and must be defined by start layer, stop layer, finished size, land, fill and stacking arrangement.
QFPCB checks:
Every drill span against the layer and lamination sequence
Finished board thickness, drill method and land relationship
Stacked, staggered, skip and buried structures by project
Microvia fill and planarization requirements
Reference-plane changes and return-via placement
Backdrill requirements and remaining stub definition
Resin filling around dense copper, buried vias and thick copper
Registration, copper balance, bow and twist risk
Flex vias, rigid-flex transitions and bend-zone exclusions
Changing a via span after layout can alter pad stacks, escape routing, reference planes and lamination cost. Confirm the architecture before the dense packages are fully routed.
Comparing Rigid, Flex, Rigid-Flex, HDI and RF Stackups
Stackup type
Primary design driver
Critical QFPCB review
Rigid multilayer
Routing, reference planes, power and thickness
Pressed dielectrics, copper balance, impedance and via aspect relationships
Flex PCB
Bend reliability, thickness and installation
Polyimide/copper construction, coverlay, stiffeners and bend-zone rules
Rigid-Flex PCB
Multiple construction zones and mechanical integration
Rigid/flex transitions, bonding, symmetry, bend direction and assembly
HDI PCB
Dense package escape and interconnect architecture
Buildup sequence, microvia spans, stacking, registration and reliability
High Frequency PCB
Impedance, loss, phase and RF geometry
Material Dk/Df, copper profile, bonding, hybrid compatibility and RF testing
Complex projects can combine categories. An HDI rigid-flex RF board, for example, needs separate rigid and flex zone drawings, a sequential lamination and microvia plan, high-frequency material data, controlled impedance structures and mechanical bend requirements. Naming the board type does not replace those details.
Common PCB Stackup Mistakes and How to Prevent Them
Choosing Layers Before Defining Reference Paths
Adding signal layers without nearby continuous references can create difficult return paths and crosstalk. Classify critical signals first, then create signal-reference pairs around them.
Copying a Generic Fabricator Stackup After Routing
A library stackup may use different dielectrics or copper from the production construction. Ask QFPCB for a reviewed stackup before final impedance routing, especially when trace width or pair spacing is constrained.
Treating Prepreg Thickness as a Fixed Number
Pressed prepreg thickness depends on resin flow and copper distribution. Use the QFPCB proposed finished construction for impedance and thickness calculations.
Adding Blind Vias Late
Blind or microvias change lamination, drilling, pads, cost and sometimes layer order. Define them before package escape. Recent engineering discussions repeatedly show that discovering fabrication limits after layout forces expensive redesign.
Using One Cross-Section for Rigid-Flex
Rigid-flex boards have different material stacks in rigid, transition and flex zones. Document every zone, bend and stiffener rather than supplying only the rigid-area stack.
Selecting RF Material by Dk Alone
Materials with similar nominal Dk can differ in Df, thickness tolerance, copper profile, TCDk, CTE and lamination behavior. Provide frequency, loss budget and mechanical requirements so QFPCB can review the complete construction.
Files Required for a PCB Stackup Review and Quote
Send the most complete package available:
Gerber X2, ODB++ or IPC-2581 fabrication data
NC drill files and a drill-span table
Dimensioned fabrication drawing and finished-thickness requirement
Proposed layer order with copper and dielectric information
Controlled-impedance table with targets, tolerances, layers and reference planes
Material callouts and permitted alternatives
Component placement or package breakout information for dense BGA areas
Flex and rigid-flex zone drawings, bend radius, bend angle, cycle count and stiffeners
HDI buildup notation, microvia spans, stacking and fill requirements
High-frequency operating range, loss targets, RF connectors and coupon/test requirements
Surface finish, applicable standards, quantity and revision
QFPCB can begin with an incomplete concept stackup, but any missing assumption will be marked for confirmation. A production quotation requires alignment between the stackup, fabrication files and acceptance criteria.
PCB Layer Stackup FAQ
Should I choose a four-layer or six-layer PCB stackup?
Choose six layers when routing density, reference-plane continuity, power distribution or sensitive signal separation cannot be handled cleanly on four layers. Four layers can still be appropriate for many designs. Compare the total project cost—including layout time, EMC risk and redesign—not only the bare-board price. QFPCB can review both concepts before routing is frozen.
What is the best four-layer PCB stackup?
There is no universal best order. Signal / Ground / Power / Signal is common, while Signal / Ground / Ground / Signal can give both outer layers a nearby ground reference with power routed outside. Dielectric spacing and plane continuity matter as much as layer names. Select the construction from signal, power, impedance and EMC requirements.
When should the PCB stackup be finalized?
Finalize it before controlled-impedance routing and dense package escape are completed. Layer order, dielectric thickness and via spans determine trace geometry and routing access. Early confirmation lets QFPCB propose available materials and manufacturable dimensions before the design becomes expensive to change.
What information is needed to calculate controlled impedance?
Provide target impedance, tolerance, signal layer, line type, reference plane, material, dielectric thickness, copper thickness, nominal trace width, differential spacing and solder-mask condition. QFPCB models the finished construction and may propose geometry changes. A note that says only “50 ohms” does not define a buildable transmission line.
How is a Flex PCB stackup different from a rigid PCB stackup?
A flex stackup uses bendable dielectric and copper constructions plus coverlay, adhesives and optional stiffeners. It must account for bend radius, bend cycles, grain direction, copper distribution and stress concentration. A rigid stackup focuses more on lamination, planes and board stiffness. Flex materials should not be substituted into a rigid template without mechanical review.
What must a Rigid-Flex PCB stackup drawing show?
Show every rigid and flex zone, layer continuity, coverlay boundaries, rigid materials, bonding layers, stiffeners, transition geometry, bend direction and drill spans. Also include the mechanical folded state when possible. One cross-section of the rigid area does not fully define a rigid-flex board.
What does 1+N+1 mean in an HDI stackup?
It means one buildup layer is added on each side of a conventional multilayer core represented by N. The notation does not define microvia spans, copper thickness, dielectrics or reference planes. Supply the complete layer and drill map so QFPCB can verify the lamination and interconnect architecture.
Should L2 always be a solid ground plane in an HDI PCB?
Not always, although a solid L2 ground plane gives L1 signals a close reference. Dense BGA escape may require limited routing on L2 with L3 used as the continuous reference. Evaluate package breakout, signal classes, via transitions and return paths together. Avoid breaking the reference plane without a defined electromagnetic reason.
What changes in a High Frequency PCB stackup?
High-frequency stackups require tighter control of material Dk/Df, dielectric thickness, copper profile, transmission-line geometry and bonding construction. Insertion loss and phase behavior can matter in addition to impedance. Hybrid RF/FR-4 builds also need compatibility, symmetry and lamination review. Provide frequency and loss requirements, not only a material brand.
Can QFPCB create the PCB stackup for my design?
Yes, QFPCB can propose a manufacturable stackup from your layer count, finished thickness, materials, copper, impedance, via architecture, bend and performance requirements. The proposal remains subject to customer approval because changes can affect routing, mechanical fit, EMC and component escape. Send the project constraints before final layout for the most useful review.
Request a QFPCB PCB Stackup Review
Send QFPCB your preliminary layer order, Gerber or ODB++, drill data, impedance targets, material requirements and board type. For Flex PCB, Rigid-Flex PCB, HDI PCB or High Frequency PCB, include the additional bend, microvia, frequency and test information described above.
QFPCB will review the construction, identify missing decisions and return questions or proposed changes before quotation and production release.
Recommended CTA: Upload your PCB files and request a QFPCB stackup and DFM review.
