What PCB Thermal Conductivity Actually Means
PCB thermal conductivity tells you how readily heat can move through a circuit board, but a finished PCB does not have one universally useful conductivity value. Copper carries heat well, while FR-4 carries it poorly. Because those materials are arranged as thin horizontal layers, a multilayer board normally conducts heat much more easily along its surface than through its thickness.
For an initial engineering model, treat the board as an orthotropic material: use one effective conductivity for heat moving in the board plane and another for heat moving through the stackup. Autodesk and Ansys use this same distinction in simplified PCB thermal models. It is the first decision to make before entering any number into a calculator.
| Quantity | What it describes | Typical use | What it does not tell you |
|---|---|---|---|
| Material conductivity | One laminate, copper foil, ceramic or insulation layer | Layer input from a datasheet | Finished-board performance |
| In-plane effective conductivity | Heat spreading along X-Y directions | Copper-plane spreading and compact CFD models | Vertical heat flow under a package |
| Through-plane effective conductivity | Heat crossing the Z-direction stackup | Heat flow from a pad toward the opposite side | Package-to-ambient temperature |
| Thermal resistance | Temperature rise per watt for a defined path and area | Comparing stackups or heat paths | A guaranteed junction temperature |
Plain-language answer: conductivity is a material-like property; thermal resistance is the result for a particular thickness, area and path. You usually need both before the estimate becomes useful.
Choose the Heat-Flow Direction Before You Calculate
Use the in-plane model when heat is expected to spread sideways through copper traces or planes. Use the through-plane model when heat must cross dielectric layers from one side of the board to the other. If both paths matter, calculate both rather than forcing the PCB into one average value.
| Your question | Direction to model first | Reason |
|---|---|---|
| Can a copper plane spread heat away from a MOSFET? | In-plane | The main path runs laterally from the source. |
| How easily can heat reach a bottom-side heat spreader? | Through-plane | The path crosses the board thickness. |
| Will a thermal via array improve the vertical path? | Through-plane plus via conductance | The vias create a parallel metal path. |
| What junction temperature will the product reach? | Neither value alone | You also need the package, interfaces, airflow, enclosure and ambient boundary. |
Gather the Stackup and Layout Inputs
A calculation is only as useful as its stackup. Do not start with “a 1.6 mm FR-4 board” if the finished construction, copper distribution and thermal path are still unknown. Gather the following inputs first.
- Finished board thickness: use the intended finished thickness, not a generic nominal value copied from another project.
- Layer-by-layer thickness: record copper foil, plated copper where relevant, cores, prepregs, adhesive and any metal or ceramic layer.
- Thermal conductivity of each material: take grade-specific values from current datasheets. High Tg does not automatically mean high thermal conductivity.
- Copper coverage by layer: estimate the fraction of each layer that forms a useful heat-spreading region. A narrow trace that ends near the source is not equivalent to a continuous plane.
- Heat-source geometry: record the exposed pad, package, copper land and the area through which heat enters the board.
- Thermal vias: note finished hole diameter, plating thickness, pitch, count, fill material and the copper layers they connect.
- Power and boundary conditions: use actual dissipated power, worst-case local ambient, airflow, board orientation and enclosure conditions.
For fabrication review, compare the assumed values with the proposed PCB layer stackup. A small change in dielectric thickness may matter more to the vertical path than a large change in an unrelated copper area.
Estimate In-Plane Effective Thermal Conductivity
For lateral heat spreading, the layers act approximately like parallel thermal paths. A first-order effective value is:
k_in-plane = sum(k_i x t_i) / sum(t_i)
Here, k_i is the thermal conductivity of layer i in W/(m*K), and t_i is its thickness. For a patterned copper layer, a simple model uses k_layer = f_i x k_copper, where f_i is the copper fraction that actually participates in spreading.
Think of this as several roads running side by side. A continuous copper plane is a fast road. FR-4 is a slow road. The effective in-plane value rises sharply when copper planes extend far enough from the heat source to carry heat toward a cooler region.
The difficult input is not copper’s conductivity; it is the useful copper coverage. Counting all copper on the board can overstate spreading. Use the local region around the source and check whether planes, wide pours or traces continue to a meaningful heat sink or board area.
Estimate Through-Plane Effective Thermal Conductivity
For heat crossing a stack of solid layers, the layers behave approximately like thermal resistances in series. The effective normal conductivity is:
k_through = total thickness / sum(t_i / k_i)
Use one consistent length unit for every thickness. The ratios cancel correctly, and the resulting conductivity remains in W/(m*K). The low-conductivity dielectric layers dominate because heat must pass through each one in sequence.
This equation describes the layered stack only. A thermal via array, copper coin, metal core or direct-bonded ceramic route can bypass part of that series path. Model such structures as additional parallel conductance rather than quietly increasing the dielectric conductivity.
Worked Example: A Four-Layer FR-4 PCB
Consider a 1.59 mm four-layer board. Following a published worked example, use copper conductivity of 390 W/(m*K), FR-4 conductivity of 0.25 W/(m*K), and 70 micrometres of equivalent heat-spreading copper. The remaining 1.52 mm is treated as FR-4.
| Input | Value | Meaning |
|---|---|---|
| Total thickness | 1.59 mm | Finished modeled board thickness |
| Equivalent active copper | 0.07 mm | Coverage-adjusted copper that spreads heat |
| FR-4 thickness | 1.52 mm | Remaining dielectric thickness |
| Copper conductivity | 390 W/(m*K) | Example input |
| FR-4 conductivity | 0.25 W/(m*K) | Example input, not a universal FR-4 value |
In-plane calculation
k_in-plane = [(390 x 0.07) + (0.25 x 1.52)] / 1.59 = 17.42 W/(m*K)
Through-plane calculation
k_through = 1.59 / [(0.07 / 390) + (1.52 / 0.25)] = 0.2615 W/(m*K)
Rounded values are 17.4 W/(m*K) in-plane and 0.26 W/(m*K) through-plane. The large difference is the lesson: a board that spreads heat reasonably well along copper can still resist heat moving through its thickness.
Convert Conductivity Into Thermal Resistance and Temperature Rise
Conductivity becomes actionable when you apply it to a defined path:
R_theta = L / (k x A)
Delta T = P x R_theta
L is path length in metres, A is the area normal to heat flow in square metres, P is heat entering that path in watts, and R_theta is K/W or degrees C/W.
For example, if the 1.59 mm board above is treated as a one-dimensional through-plane path across a 10 mm by 10 mm area, the idealized board resistance is approximately:
R_theta = 0.00159 / (0.2615 x 0.0001) = 60.8 K/W
At 1 W, that model gives a 60.8 C temperature difference across the path. This is a screening result, not a junction-temperature prediction. A real source spreads in three dimensions, and its package, solder, vias, opposite-side copper, airflow and enclosure create additional parallel and series paths.
Add Thermal Vias Without Treating Them as Solid Copper
A plated thermal via is a hollow copper cylinder, not a solid copper rod. Estimate the copper cross-sectional area from the finished hole diameter and plating thickness, calculate the conductance of one via, then multiply by the number of vias that are thermally connected at both ends.
For a thin plating wall, the copper area can be approximated as:
A_copper approximately pi x finished hole diameter x plating thickness
The via conductance is then G = k_copper x A_copper / L. Add the via-array conductance in parallel with the dielectric path. If vias are filled, capped or connected through solder and pads, use the actual construction rather than assuming the barrel alone describes the complete route.
Three checks prevent optimistic results: confirm the finished dimensions with the fabricator, verify that every via reaches a real spreading plane, and include the contact or interface after heat leaves the board.
Know When the Hand Calculation Stops Being Reliable
Hand calculations are useful for comparing concepts and catching obviously weak thermal paths. They become unreliable when the geometry or boundary conditions control the result more strongly than the bulk stackup.
| Warning sign | Why the simple model weakens | Next action |
|---|---|---|
| Small hot component on a large board | Three-dimensional spreading dominates near the source | Use a local package-and-board model |
| Dense or irregular via field | Vertical and lateral paths interact | Import actual ECAD geometry or build a calibrated compact model |
| Metal-core or ceramic construction | Thin insulation and interfaces can dominate despite a conductive base | Model the complete stack, not only the base material |
| Sealed enclosure or weak airflow | Board-to-air resistance may dominate | Include enclosure and convection boundaries |
| Temperature-sensitive material data | k and power loss can change with temperature | Use temperature-dependent properties where available |
| Safety or lifetime depends on a few degrees | Input uncertainty is larger than the design margin | Run simulation and prototype testing |
A useful rule is to use the hand model for direction and sensitivity, not certification. It should tell you which variable is dominant and which design deserves detailed verification.
Validate the Estimate With Simulation or Prototype Tests
Validation should progress with project risk. Start with an independent spreadsheet check. Next, use an orthotropic compact PCB model with separate in-plane and through-plane properties. For concentrated heat sources, complex vias or tight margins, import actual copper and stackup geometry into CFD or another suitable multiphysics tool.
- Verify units and reproduce the calculation independently.
- Run sensitivity cases for dielectric k, copper coverage, layer thickness, power and ambient temperature.
- Compare a compact orthotropic model with a higher-detail model around the hot component.
- Build a representative assembly, not an unloaded bare board, when package and solder paths matter.
- Measure at steady state and during relevant transients using calibrated thermocouples, resistance-temperature methods or a correctly configured thermal camera.
- Compare measured temperature locations with the model, then adjust uncertain contact and convection inputs rather than changing material properties without evidence.
Texas Instruments notes that medium- and high-power designs often require system-level modeling or prototype confirmation because the package, copper spreading and thermal vias work together. The goal is not to make the spreadsheet look exact; it is to find a model that predicts the real assembly closely enough for the decision.
Technical references used for the model
- Ansys Icepak PCB modeling training
- Autodesk CFD PCB material model
- TI: Using Thermal Calculation Tools for Analog Components
Send the Right Thermal Data to Your PCB Manufacturer
A fabricator cannot validate a thermal assumption from Gerbers alone. Send a controlled data package that connects the calculation to a buildable stackup.
- Gerber or ODB++ data and NC drill files
- Proposed layer stackup with finished thickness and copper weights
- Required laminate family or grade and the property source used
- Copper coverage or critical spreading regions around hot components
- Thermal-via finished hole, plating, pitch, count, fill and cap requirements
- Heat-source locations, dissipated power and allowable temperatures
- Any metal-core, ceramic, copper coin, heatsink or interface requirement
- Requested DFM review, impedance interaction if relevant, and prototype test plan
For unusual heat paths, compare standard multilayer construction with a suitable metal-core PCB or ceramic PCB only after the thermal bottleneck is identified. A conductive base does not help if the insulation layer, package interface or enclosure remains dominant.
To request a stackup and manufacturability review, contact QFPCB with the files and thermal inputs above. The useful question is not “What is your PCB thermal conductivity?” but “Can you confirm this finished construction and the material values used in our model?”
FAQ: Estimating PCB Thermal Conductivity
Does FR-4 have one standard thermal conductivity?
No. Values vary with resin system, glass content, temperature and test method. Use the selected laminate’s current datasheet and treat generic values only as early estimates.
Is high-Tg FR-4 also highly thermally conductive?
Not necessarily. Tg describes a transition in mechanical behavior; thermal conductivity describes heat transfer. A high-Tg grade can still have modest conductivity.
Can I use a volume-weighted average for the whole PCB?
It can provide a rough screening value, but it hides direction. A layered PCB normally needs separate in-plane and through-plane values.
Should every copper layer be included in the in-plane calculation?
Include copper that forms a useful path from the heat source toward a cooler region. Isolated pours and short traces should not be counted as if they were continuous planes.
Do thermal vias increase the laminate conductivity?
No. They add parallel vertical conductance through the board. Model the via barrels and their connections separately from the dielectric stack.
Can effective conductivity predict component junction temperature?
Not by itself. Junction temperature also depends on the package, solder, copper layout, vias, interfaces, airflow, enclosure, ambient temperature and dissipated power.
When is a spreadsheet estimate good enough?
It is useful for comparing stackups, identifying dominant variables and rejecting clearly weak concepts. Use simulation and prototype measurements when margins are tight or geometry is complex.
What should I ask the PCB supplier to confirm?
Ask for the finished stackup, actual material grade, dielectric thicknesses, finished copper, thermal-via construction and any manufacturing change that alters the modeled heat path.
